In order to meet the recent market preference for the smaller electronic appliances, dimensions of electronic components to be built in such appliances have been shrinking remarkably. The same goes with printed circuit boards and multilayer ceramic substrates constituting an electronic circuit. Helped by new technologies of forming conductive elements or via holes of a circuit in smaller dimensions, or by new technologies of stacking these in a multilayered configuration the wiring density in a circuit has been and will still be increased.
A conventional method for fabricating a multilayer ceramic substrate is described in the following with reference to FIG. 19(a) through FIG. 19(g). In the first place, a green sheet 51 of approximately 0.2 mm thick made mainly of alumina is provided, a via hole 52 is perforated therein at a certain specific place by punching or by means of CO2 laser, the via hole 52 is then filled with an electroconductive paste (a tungsten paste, for example) by a screen printing process or other such technology and dried to complete a via 53. Then, a certain desired circuit pattern comprised of a conductive pattern 54 is formed on the green sheet 51 by screen-printing an electroconductive paste. A circuit substrate 55, which being a first layer, is thus provided.
In the same way, a second-layer circuit substrate 56, a third-layer circuit substrate 57, and, if needed, a fourth-layer circuit substrate 58 are provided; by pressing these circuit substrates together after aligning each other to a specified relative positioning a stacked circuit substrate 59 is obtained. And then it is burned at a high temperature 900-1600° C. to make a multilayer ceramic substrate 60. According to the above method, the circuit density may be increased by increasing the number of layers of the circuit substrate.
However, a conventional method for manufacturing a multilayer ceramic substrate has drawbacks in the following points.
(1) As a conductive pattern 54 is formed by means of screen printing, it is quite difficult to provide a conductive pattern in the dimensions finer than the line width (W)/line space (S)=75 μm/75 μm.
(2) In forming a conductive pattern 54 by screen printing, the film thickness of which goes thinner when the pattern is made finer. For example, when W=75 μm the greatest film thickness available is approximately 5 μm. This brings about a high electrical resistance of a wiring.
(3) In case that tungsten, among others, is used for the wiring, the disadvantages become increasingly significant when a wiring pattern is made finer, because the resistance of the wiring of tungsten is higher than silver (Ag) or copper (Cu) by approximately 3 to 5 times. Therefore, in many cases such a device may be unable to function as an electrical component.
(4) As both the substrate and the wiring material are burned simultaneously in a temperature as high as 900-1600° C., the shrinkage of material after burning reaches 15-20%; this leads to a substantial dimensional dispersion among the substrates. This results in a substantial dispersion in the dimensions of the wiring portion, which in turn results in an inaccuracy of connection with the very fine bumps of an LSI. This is a cause of deteriorated yield rate after mounting.
(5) Furthermore, when forming a conductive pattern 54 by screen printing, it requires the line width to be greater than 75 μm (normally it is more than 120 μm, taking the yield rate at printing and the wiring resistance into consideration). This necessitates the wirings to be formed in multiple layers if many wiring lines are to be formed within a limited space. The formation of lines in a higher number of multiple layers, and the control of dimensional accuracy within a high precision level inevitably lead to higher substrate cost.